Low dielectric constant etch stop films

ABSTRACT

An amorphous material containing silicon, carbon, hydrogen and nitrogen, provides a barrier/etch stop layer for use with low dielectric constant insulating layers and copper interconnects. The amorphous material is prepared by plasma assisted chemical vapor deposition (CVD) of alklysilanes together with nitrogen and ammonia. Material that at the same time has a dielectric constant less than 4.5, an electrical breakdown field about 5 MV/cm, and a leakage current less than or on the order of 1 nA/cm 2  at a field strength of 1 MV/cm has been obtained. The amorphous material meets the requirements for use as a barrier/etch stop layer in a standard damascene fabrication process.

TECHNICAL FIELD

[0001] This invention relates generally to the fabrication ofmicroelectronic devices, and more specifically to methods for formingetch stop and barrier layers with low dielectric constants and to thecomposition of the etch stop layers.

BACKGROUND

[0002] Microelectronic integrated circuits based on patternedsemiconductor materials are continuing to evolve towards devices with anextremely high density of circuit elements per unit volume. As thefeatures of these devices are reduced to smaller sizes, the performanceof the materials that constitute the device will critically determinetheir success. One specific area in need of advancement is theelectrical insulator used between the wires, metal lines, and otherelements of the circuit. As the distances between the circuit elementsbecome smaller, there will be increased problems due to capacitivecoupling (crosstalk) and propagation delay. These difficulties can beavoided by preparing the circuit using an insulating material thatpossesses a dielectric constant as low as possible. In particular, it isdesired that the insulating material possess a dielectric constant belowthe dielectric constant of about 4 of silicon dioxide, the material thathas long been used in integrated circuits as the primary insulatingmaterial

[0003] In addition to using low dielectric constant (low k) insulatingmaterials, the next generation of devices will increasingly use copperfor the metal interconnects because of the lower resistivity of copperas compared with aluminum, the conductor in current use. In order toprevent diffusion of copper between metals levels in multilevel devicesand to prevent diffusion of copper into adjacent dielectric layers, abarrier layer is provided below each copper interconnect level. Thebarrier level also serves as an etch stop layer in the dielectric etchof the vias, which is a necessary step in the process of fabricatingdevices. Currently, silicon nitride is typically used as the materialfor the barrier layer. However, silicon nitride has a dielectricconstant around 7. In order to fully exploit low k insulating materialsand copper interconnects, an etch stop barrier material with adielectric constant lower than that of silicon nitride is desired.

[0004] Furumura et al. in U.S. Pat. No. 5,103,285 and Loboda et al. inU.S. Pat. No. 5,818,071 teach the use of silicon carbide as analternative diffusion barrier layer. However, the silicon carbide filmconventionally formed by chemical vapor deposition of silane andmethane, which typically contains hydrogen, is characterized by highleakage current and low breakdown field. Values for conventional siliconcarbide are quoted, for example, by Xu et al., IITC ConferenceProceedings, pp. 109-11, (June, 1999) who disclose an alternativebarrier/etch stop film composed of silicon, carbon and hydrogen. Thereremains, however, a need for a material with a low leakage current andhigh breakdown field that combines the hardness benefits of siliconnitride as an etch stop layer with a dielectric constant lower than thatof silicon nitride.

SUMMARY

[0005] An amorphous material containing silicon, carbon, hydrogen andnitrogen, denoted a-Si:C:H:N, provides a barrier/etch stop layer for usewith low dielectric constant insulating layers and copper interconnects.The material has an elemental composition that is about 15 to 40%silicon, about 20 to 40% carbon, about 25-55% hydrogen, and about 2-20%nitrogen. The amorphous material is prepared by plasma assisted chemicalvapor deposition (CVD) of alleilanes, such as tetramethylsilane,together with nitrogen and ammonia. Useful process conditions includeflow rates of alkylsilane, nitrogen, and ammonia each in the range ofabout 500 to 2000 standard cubic centimeters per minute (sccm). Theratio of the sum of nitrogen and ammonia flow rates to the alkylsilaneflow rate varies between about 0.25:1 and about 2.75:1. Favorableresults have been obtained under conditions in which ammonia constitutesat least about 15% of the sum of the nitrogen and ammonia flow rates.

[0006] The deposition process provides an a-Si:C:H:N material that atthe same time has a dielectric constant less than about 6 and favorableelectrical and mechanical properties. Films with a dielectric constantless than about 4.5, that do not experience electrical breakdown at afield strength of about 5 MV/cm, and that have a leakage current lessthan or on the order of 1 nA/cm² at a field strength of 1 MV/cm havebeen obtained. The films have excellent mechanical properties; hardnessgreater than 8 Gpa and compressive stress as low as 50 Mpa. They alsoserve as an effective diffusion barrier; no copper diffusion wasobserved after 26 hours through a 500 Å thick film held at 250° C. at anapplied field of 1 MV/cm. In addition, the a-Si:C:H:N film has an etchrate in a standard fluorocarbon dry etch that is at least 2 times slowerand as much as 10-12 times slower than the etch rate of silicon dioxide.

[0007] The amorphous material meets the requirements for use as abarrier/etch stop layer in a standard damascene fabrication process. Theprocess includes depositing an etch stop layer of a-Si:C:H:N material ona substrate where the substrate has regions of metal conductor andregions of insulating material, depositing a layer of insulatingmaterial on the etch stop layer, and etching patterns in the layer ofinsulating material where the etch stop layer etches at a slower ratethan the layer of insulating material. The patterns are then lined andfilled with a conductor. In some processes, the amorphous material isalso used as an etch stop material within the layer of insulatingmaterial, separating a trench level and a via level.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008]FIGS. 1a-1 h are schematic representations of a dual damasceneprocess of fabricating structures with copper interconnects, in whichthe present invention can be incorporated.

[0009]FIGS. 2a and 2 b are alternatives for FIGS. 1c and 1 d for thecase where the trench and via layers of insulating material areseparated by an etch stop layer.

[0010] Use of the same reference number in different figures denotesidentical or similar elements.

DETAILED DESCRIPTION

[0011] An amorphous material containing silicon, carbon, hydrogen andnitrogen provides an barrier/etch stop layer for use with low dielectricconstant insulating layers and copper interconnects. The amorphousmaterial, denoted a-Si:C:H:N, is prepared by chemical vapor deposition(CVD) of substituted silanes together with nitrogen and ammonia.

[0012] According to an aspect of the present invention, the barrier/etchstop layer has an elemental composition that is about 15 to 40% silicon,about 20 to 40% carbon, about 25-55% hydrogen, and about 2-20% nitrogen.The amorphous material may optionally contain a trace of oxygen, up toabout 0.1%. Preferably, the a-Si:C:H:N material is about 20 to 35%silicon, about 20 to 35% carbon, about 30 to 55% hydrogen, and about 3to 15% nitrogen; and most preferably, the material is about 20 to 25%silicon, about 22 to 28% carbon, about 35 to 48% hydrogen, and about 5to 10% nitrogen.

[0013] The silicon-containing precursor gas for the chemical vapordeposition of a-Si:C:H:N is an alkylsilane, such as tetramethylsilane,trimethylsilane, dimethylsilane, or methylsilane. A combination ofnitrogen and ammonia is used as the nitrogen source. A plasma assistedCVD process is used. As is well known in the art, there are two maintypes of plasma CVD reactors. When a capacitively coupled parallel platereactor is used, the deposition process is conventionally termed plasmaenhanced CVD (PECVD). The plasma may be formed in the PECVD reactor by aradio frequency (rf) discharge at a single frequency. A low frequency rfbias may optionally be applied, in addition. An example of a PECVDreactor is the Sequel™ reactor of Novellus Systems (San Jose, Calif.).Alternatively, a high density plasma reactor (HDP) in which the plasmais formed by electron cyclotron resonance (ECR) or as an inductivelycoupled plasma (ICP) may be used. An optional low frequency rf bias maybe applied in HDP reactors. An example of an HDP reactor is the Speed™reactor of Novellus Systems.

[0014] Both the ratios of process gases and the plasma depositionconditions have been shown to affect the properties of the resultingfilm. Films may have the same elemental composition but differ in theirelectrical properties depending on the process conditions with whichthey were deposited. The following process conditions are used for thechemical vapor deposition of the present a-Si:C:H:N films. The flowrates of alkylsilane, nitrogen, and ammonia are each in the range ofabout 500 to 2000 standard cubic centimeters per minute (sccm). Theratio of the sum of nitrogen and ammonia flow rates to the alkylsilaneflow rate can vary between about 0.25:1 and about 2.75:1. Processes inwhich ammonia constitutes at least about 15% of the sum of nitrogen andammonia have been shown to be beneficial. The rf discharge at thestandard 13.56 MHz frequency is operated at a power level of betweenabout 800 and 2500 watts. The power level of the optional low frequencyrf bias is up to about 1000 watts. The reactor is operated at a totalpressure of between about 4 mTorr and 5 Torr and at a temperaturebetween about 250 and 450° C. Good results have been obtained with atetramethylsilane flow rate between about 1200 and 1800 sccm, ammoniaflow rate between about 1000 and 1400 sccm and nitrogen flow ratebetween about 1000 and 1500 sccm, where the ratio of the sum of nitrogenand ammonia flow rates to the alkylsilane flow rate is between about1.1:1 and about 1.6:1 (See Table 1 below). In addition, there is someevidence that the dielectric constant and breakdown field of theresulting film is affected by controlling the flow rate of ammonia.

[0015] The present process produces films that at the same time havedielectric constants below 6 and advantageous electrical and mechanicalproperties for use as barrier/etch stop layers. As shown in particularin Table 2 below, the present process produces a film with a density ofat least 1.6 g/cm³, a dielectric constant less than 4.5, that does notexperience electrical breakdown at a field strength of about 5 MV/cm,and that has a leakage current less than or on the order of 1 nA/cm² ata field strength of 1 MV/cm. The film has excellent mechanicalproperties; hardness greater than 8 Gpa and compressive stress as low as50 Mpa. No copper diffusion was observed after 26 hours through a 500 Åthick film held at 250° C. at an applied field of 1 MV/cm. In addition,the a-Si:C:H:N film has an etch rate in a standard fluorocarbon dry etchthat is at least two times slower and as much as 10-12 times slower thanthe etch rate of silicon dioxide. Thus, the amorphous film produced bythe present process meets the requirements for use as a barrier/etchstop layer in next generation integrated circuit devices.

[0016] For example, the amorphous film is used as a barrier/etch stoplayer in a dual damascene process for fabricating structures with copperinterconnects, as illustrated schematically in FIGS. 1a-1 h. A firstmetal layer with devices 10, metal contacts 12, typically, tungsten, andcopper conductor 14 is shown in FIG. 1a. A thin layer 15 of a-Si:C:H:N,according to the present invention, serves as an etch stop layer andbarrier against diffusion of copper between metal levels. Insulatinglayer 16 is deposited over the barrier/etch stop layer 15, as shown inFIG. 1b. Insulating layer 16 can be a conventional silicon dioxide layeror a low dielectric constant layer, for example, a carbon doped siliconoxide layer.

[0017] A photoresist layer 18 is deposited over insulating layer 16 andpatterned for the vias (FIG. 1c), followed by a via etch through layer16 (FIG. 1d) Next, a second photoresist layer 20 is deposited andpatterned for the trenches (FIG. 1e) and a trench is etched throughinsulating layer 16 resulting in the pattern shown in FIG. 1f. Thetrench etch stops on barrier/etch stop layer 15. Because the a-Si:C:H:Nmaterial etches at a rate that is 10 times slower than the etch rate ofsilicon dioxide, it is an excellent etch stop material. Manyalternative, low-k insulating layers, such as carbon doped silicon oxidewill have etch properties similar to those of conventional silicondioxide. Thus, a-Si:C:H:N is advantageously used as an etch stop layerwith a range of insulating materials.

[0018] In FIG. 1c a thick insulating layer 16 is shown which willultimately accommodate both the via and trench levels. Alternatively,the via level 16 a and trench level 16 b are separated by an etch stoplayer 35, as shown in FIG. 2a. The structure shown in FIG. 2a isgenerated by three separate depositions. Amorphous a-Si:C:H:N iseffectively used as etch stop layer 35 in this alternative such that thevia etch through the trench level 16 b stops on etch stop layer 35, asshown in FIG. 2b.

[0019] Returning to the process flow in FIGS. 1a-1 h, the portionofbarrier/etch stop layer 15 under the vias in FIG. 1f is removed. Next,the trenches and vias are typically lined with a liner metal 22 (FIG.1g), filled with copper 24, and planarized by chemical mechanicalpolishing to produce the structure of FIG. 1h. The structure of FIG. 1hincludes a region 15 a, where insulating layer 16, of the second layer,is separated from copper conductor 14, of the first layer, bybarrier/etch stop layer 15. In addition to serving as an etch stoplayer, layer 15 provides a barrier to diffusion of copper ions fromconductor 14 to insulating layer 16. Such diffusion, if allowed tooccur, would degrade performance of the integrated circuit device.Although a two-layer structure is shown in the above example, thea-Si:C:H:N material may be used as a barrier/etch stop layer for anylayer of a multilevel device. For example, a layer of a-Si:C:H:Nmaterial can be deposited over the top of the structure in FIG. 1h toserve as a barrier/etch stop layer of a third level.

[0020] Thus, it may be seen that the amorphous material containingsilicon, carbon, hydrogen, and nitrogen provides barrier/etch stoplayers with excellent properties for modern fabrication processes.Although the invention has been described with reference to particularexamples, the description is only an example of the invention'sapplication and should not be taken as a limitation. Various adaptationsand combinations of features of the examples disclosed are within thescope of the invention as defined by the claims following the examplebelow.

EXAMPLES

[0021] Amorphous layers containing silicon, carbon, hydrogen, andnitrogen were deposited on 8 inch wafers in a Novellus Systems Inc.Sequel 2™ reactor using a range of process conditions as given below inTable 1. Detailed measurements of film properties for Example B aregiven in Table 2. Dielectric constant, leakage current, and breakdownfield were measured on capacitors formed using sputtered aluminum gateelectrodes on 500 Å thick films at a current of 1 mA/cm². Density wasdetermined by dividing the difference in weight of the wafer before andafter deposition by the product of the known area and the measuredthickness. Bias temperature stress measurements were performed byapplying an electric field to a structure consisting of aluminumelectrodes on a 500 Å thick layer of a-Si:C:H:N, overlying a copperlayer. TABLE 1 Process Conditions and Film Properties* HFRF LFRFDeposition NH₃ N₂ power power Rate Leakage Thickness Ex. (sccm) (sccm)(W) (W) (Å/min) k (nA/cm²⁾ (Å) A 1200 1000 1500 200 940 4.21 1 752 B1200 1000 1500 300 1323 4.38 1 1059 C 1000 1000 1500 300 1311 4.52 1.31049 D 1200 1000 1700 300 1470 4.33 1.3 735 E 1200 1000 1500 400 17804.73 1.1 890 F 1200 1500 1500 300 1339 4.52 1.5 1071 G 1200 1500 1500300 1314 4.64 0.9 1051 H 1200 2000 2000 300 1648 4.56 2 824

[0022] TABLE 2 Process Conditions and Film Properties for Example BTetramethylsilane flow rate 1500 sccm Ammonia flow rate 1200 sccmNitrogen flow rate 1000 sccm RF power at 13.56 MHz 1500 W RF power at400 kHz  300 W Temperature 400° C. Pressure 4 torr Dielectric constant4.38 Density 1.75 ± 0.15 g/cm³ Breakdown field 5 MV/cm Leakage current˜1 nA/cm² at 1 MV/cm Stress 50 Mpa compressive Deposition rate 1323Å/min Thickness uniformity 1.5% (9 points) 2.5% (49 points) Thicknessshrinkage <0.5% after 400° C. anneal for 4 hours Cracking thickness >2microns Stud pull on Cu 6-9.3 kpsi Stud pull on SiO₂ 7.2-9.7 kpsiHardness 8 Gpa Atomic composition Si 23% H 41% C 25% N 8% Biastemperature stress at 1 MV/cm, >26 hours 250 ° C.

[0023] Thus, it is evident, processes according to the present inventionprovide amorphous films containing silicon, carbon, hydrogen, nitrogenthat are characterized by a dielectric constant less than 4.5, a lowleakage current, breakdown field of 5 MV/cm and the ability to withstanda bias temperature stress test for over 26 hours. These films areadvantageously used as a copper diffusion barrier and etch stop layer infabricating integrated circuit devices.

We claim:
 1. A method of fabricating an integrated circuit device, themethod comprising: depositing a layer of amorphous material comprisingsilicon, carbon, nitrogen, and hydrogen by chemical vapor deposition ona substrate, the substrate comprising regions of metal conductor andregions of insulating material; depositing a layer of insulatingmaterial on the amorphous layer; and etching patterns in the layer ofinsulating material wherein the amorphous layer etches at a slower ratethan the layer of insulating material.
 2. The method of claim 1 whereinthe amorphous material comprises between about 15% and about 40%silicon, between about 20% and about 40% carbon, between about 25% andabout 55% hydrogen and between about 2% and about 20% nitrogen.
 3. Themethod of claim 1 wherein the amorphous material responds to afluorocarbon etch at a rate that is at least two times slower than therate at which the layer of insulating material responds.
 4. The methodof claim 1 wherein the insulating material is a low dielectric constantmaterial.
 5. The method of claim 2 wherein the layer of amorphousmaterial is deposited using process gases comprising an alkylsilane,nitrogen, and ammonia.
 6. The method of claim 5 wherein the alkylsilaneis tetramethylsilane and the ratio of the sum of the flow rate ofnitrogen and ammonia to the flow rate of tetramethylsilane is betweenabout 0.25:1 and about 2.75:1.
 7. The method of claim 6 wherein the flowrate of ammonia is at least about 15% of the sum of the flow rates ofnitrogen and ammonia.
 8. The method of claim 5 wherein the layer ofamorphous material has a dielectric constant less than about 6 and doesnot experience electrical breakdown at a field strength of 5 MV/cm. 9.The method of claim 8 wherein the layer of amorphous material has adensity of at least about 1.6 g/cm³ and a hardness of at least about 8gigapascals.
 10. The method of claim 1 further comprising: filling theetched patterns in the layer of insulating material with metal; anddepositing a layer of amorphous material comprising silicon, carbon,nitrogen, and hydrogen by chemical vapor deposition on the metal filledlayer of insulating material.
 11. The method of claim 1 furthercomprising depositing an etch stop layer comprising silicon, carbon,nitrogen, and hydrogen by chemical vapor deposition on the layer ofinsulating material; depositing a trench level layer of insulatingmaterial on the etch stop layer, and etching a via pattern in the trenchlevel layer of insulating material wherein the etch stop layer etches ata rate that is slower than the rate at which the trench level layer ofinsulating material etches.
 12. An integrated circuit device comprising:a first level substrate comprising regions of metal conductor andregions of insulating material; a layer of amorphous material comprisingsilicon, carbon, nitrogen, and hydrogen overlying the substrate; and asecond level layer of insulating material overlying the layer ofamorphous material, wherein the amorphous material etches at a rate thatis slower than the rate at which the layer of insulating materialetches.
 13. The device of claim 12 wherein the amorphous materialcomprises between about 15% and about 40% silicon, between about 20% andabout 40% carbon, between about 25% and about 55% hydrogen and betweenabout 2% and about 20% nitrogen.
 14. The device of claim 13 wherein theamorphous material has a dielectric constant about 6 or below.
 15. Thedevice of claim 14 wherein the amorphous material has a dielectricconstant less than about 4.5 and does not experience electricalbreakdown at a field strength of 5 MV/cm.
 16. The device of claim 14wherein the amorphous material has a density of at least about 1.6 g/cm³and a hardness of at least about 8 gigapascals.
 17. The device of claim12 wherein the second level layer of insulating material comprisespatterns filled with metal.
 18. The device of claim 17 wherein the metalis copper.
 19. The device of claim 17 further comprising a layer ofamorphous material comprising silicon, carbon, nitrogen, and hydrogenoverlying the second level layer of insulating material.
 20. The deviceof claim 12 wherein the device comprises regions wherein insulatingmaterial in the second level layer of insulating material is separatedfrom a region of metal conductor in the first level substrate by thelayer of amorphous material and wherein the layer of amorphous materialserves as a barrier to migration of metal from the region of metalconductor in the first level substrate.
 21. The device of claim 12wherein the second level layer of insulating material comprises silicondioxide.
 22. The device of claim 12 wherein the second level layer ofinsulating material comprises a low dielectric constant insulatingmaterial.
 23. A method of producing an etch stop layer on a substrate,the method comprising: introducing the substrate into a reactor;providing a flow of process gases comprising an alkylsilane, nitrogen,and ammonia to the reactor wherein the ratio of the sum of the flow rateof nitrogen and ammonia to the flow rate of alkylsilane is between about0.25:1 and about 2.75:1; producing a plasma condition in the reactorwherein reaction of the process gases results in deposition of the etchstop layer on the substrate.
 24. The method of claim 23 wherein the etchstop layer is an amorphous material comprising between about 15% andabout 40% silicon, between about 20% and about 40% carbon, between about25% and about 55% hydrogen and between about 2% and about 20% nitrogen.25. The method of claim 23 wherein the alkylsilane is tetramethylsilaneand the ratio of the sum of the flow rate of nitrogen and ammonia to theflow rate of tetramethylsilane is between about 1.1:1 and 1.6:1.
 26. Themethod of claim 25 wherein the flow rate of ammonia is at least about15% of the sum of the flow rates of nitrogen and ammonia
 27. The methodof claim 23 wherein the etch stop layer has a dielectric constant about6 or below.
 28. The method of claim 27 wherein the etch stop layer has adielectric constant less than about 4.5 and does not experienceelectrical breakdown at a field strength of 5 MV/cm.
 29. The method ofclaim 27 wherein the etch stop layer has a density of at least about 1.6g/cm³ and a hardness of at least about 8 gigapascals.